Computer organization and architecture / (Record no. 952)

MARC details
000 -LEADER
fixed length control field 02045nam a22002417a 4500
003 - CONTROL NUMBER IDENTIFIER
control field LSCPL
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20191107123504.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 130627t2002 ii.ill.g |||| 001 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780070141797 (pbk)
040 ## - CATALOGING SOURCE
Transcribing agency NCL
Modifying agency LIN2019
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 004.22
Item number STA-C 2011 2910
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Carter, Nicholas P.
245 1# - TITLE STATEMENT
Title Computer organization and architecture /
Statement of responsibility, etc. by Nicholas P Carter,
246 ## - VARYING FORM OF TITLE
Title proper/short title Computer organization & architecture
250 ## - EDITION STATEMENT
Edition statement 2nd ed.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc. New Delhi :
Name of publisher, distributor, etc. Tata McGraw,
Date of publication, distribution, etc. 2002c.
300 ## - PHYSICAL DESCRIPTION
Extent Various pages. :
Other physical details ill. ;
Dimensions 24 cm.
500 ## - GENERAL NOTE
General note Index included
505 ## - FORMATTED CONTENTS NOTE
Formatted contents note Chapter 1: Introduction------------------------<br/>Chapter 2: Computer Organization---------------------<br/>Chapter 3: Computer Arithmetic------------------------<br/>Chapter 4: Instruction Sets and The Processor Organizations--------------------------<br/>Chapter 5: Basic Processing Unit-- Register transfer language, microoperations, hardware and microprogrammed control unit organizations----------------------------<br/>Chapter 6: Instruction Pipelining and Parallel Processing----------------------------<br/>Chapter 7: Instruction-Level Parallelism-VLIW, Vector, Array, and Multithreaded Processors and Using Parallel Optimizing Compiler---------------------------<br/>Chapter 8: The Memory system----------------------------<br/>Chapter 9: Caches--------------------------<br/>Chapter 10: Virtual Memory---------------------------<br/>Chapter 11: Input/Output Organization---------------------------<br/>Chapter 12: Multiprocessor Architectures---------------------------<br/>
520 ## - SUMMARY, ETC.
Summary, etc. "This book provides comprehensive and completely up-to-date coverage of computer organization and architecture. This book covers the leading-edge areas of superscalar design, IA-64 design features and parallel processor organization trends. It meets students' needs by addressing both the fundamental principles as well as the critical role of performance in driving computer design. This book also includes an
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer organization.
9 (RLIN) 108
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Koha item type Reference
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Home library Current library Shelving location Date acquired Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type Source of acquisition Inventory number Total Renewals Date checked out Copy number
          Namal Library Namal Library Reference 06/27/2013   004.22 STA-C 2000 1258 1258 07/18/2013 07/18/2013 Reference          
          Namal Library Namal Library Computer Science 12/26/2013 3 004.22 STA-C 2002 2910 0002910 08/06/2019 12/26/2013 Books Allied book company Bill No. 2984 2 08/05/2019 2
          Namal Library Namal Library Computer Science 12/31/2013 1 004.22 STA-C 2011 3647 0003647 04/05/2017 12/31/2013 Books Allied book company Bill No. 2984   03/22/2017 3