Computer architecture : a quantitative approach / by John L. Hennessy and David A. Patterson

By: Hennessy, John LContributor(s): Patterson, David AMaterial type: TextTextPublication details: New Delhi : Morgan Kaufmann, 2012cEdition: 5th edISBN: 9789381269220 (pbk)Subject(s): Computerarchitekture | Computer ScienceDDC classification: 004.2
Contents:
Chapter 1: Fundamentals of Quantitative analysis and Design--------------------- Chapter 2: Memory hierarchy design-------------------- Chapter 3: Instruction-Level parallelism and its exploitation--------------------- Chapter 4: Data-Level parallelism in vector, SIMD and GPU Architectures-------------------------- Chapter 5: Thread-Level Parallelism------------------------- Chapter 6: Warehouse-scale computers to exploit request-level and data-level parallelism---------------------------- Appendix A: Instruction set principle----------------------- Appendix B; Review of memory hierarchy------------------------- Appendix C: Pipelining: Basic and intermediate concepts------------------------
Summary: The computing world today is in the middle of a revolution: mobile clients and cloud computing have emerged as the dominant paradigms driving programming and hardware innovation today. This title
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Holdings
Item type Current library Call number Copy number Status Date due Barcode Item holds
Reference Namal Library
Reference
004.2 HEN-C 2012 18 (Browse shelf (Opens below)) 1 Not for loan 18
Books Books Namal Library
Computer Science
004.2 HEN-C 2012 20 (Browse shelf (Opens below)) 3 Available 20
Books Books Namal Library
Computer Science
004.2 HEN-C 2012 19 (Browse shelf (Opens below)) 2 Available 19
Total holds: 0

Include bibliography references and index

Chapter 1: Fundamentals of Quantitative analysis and Design---------------------
Chapter 2: Memory hierarchy design--------------------
Chapter 3: Instruction-Level parallelism and its exploitation---------------------
Chapter 4: Data-Level parallelism in vector, SIMD and GPU Architectures--------------------------
Chapter 5: Thread-Level Parallelism-------------------------
Chapter 6: Warehouse-scale computers to exploit request-level and data-level parallelism----------------------------
Appendix A: Instruction set principle-----------------------
Appendix B; Review of memory hierarchy-------------------------
Appendix C: Pipelining: Basic and intermediate concepts------------------------

The computing world today is in the middle of a revolution: mobile clients and cloud computing have emerged as the dominant paradigms driving programming and hardware innovation today. This title

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