Network Processor Design : Vol. 2: Issues and Practices/
Material type: TextSeries: Publication details: San Diego : Morgan Kaufmann [Imprint] 2002cDescription: (464 p.) : ill. ; 24 cmGenre/Form: Electronic books.Additional physical formats: Print version:: Network Processor DesignDDC classification: 621.3Item type | Current library | Call number | Status | Date due | Barcode | Item holds |
---|---|---|---|---|---|---|
Books | Namal Library Electrical Engineering | 621.3 CRO-N 2002 3299 (Browse shelf (Opens below)) | Available | 0003299 |
Index present
1: Network Processors: Themes and challenges
2: A programmable, Scalable platform for next generation networking
3: Power consideration in network processor design
4: Worst - case execution time estimation for hardware - assisted multithreaded processors
5: Multiprocessor scheduling in processor - based router platforms : issues and ideas
6: A massively multithreaded packet processor
7: Exploring trade - offs in performance and programmability of processing element toplogies for network processor
8: Packet classification and termination in aprotocol processor
9: NP- click : A programming model for the intel IXP1200
10: NEPAL: A framework for efficiently structuring applications for network processors
11: Efficient and faithful performance modeling for network-processor-based system designs
12: High-speed legitimacy- based DDoS packet filtering with network processors: A case study and implementation on the intel IXP1200
13: Directions in packet classification for network processors
14: Implementing high- performance, high-value traffic management using agere network processor solutions
15: AMCC nPcore NISC Architecture
16: Adaptable bandwidth allocation for QoS support in network processor
17: IDT network search engine with QDR LA-1 interface
18: Implementing voice over AAL2 on a network processor
19: Implementing QoS mechanisms on the motorola C-Port C-5e network processor
20: A c-Based programming language for multiprocessor network SoC architectures
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Annotation <p><br />As the demand for digital communication networks has increased, so have the challenges in network component design. To meet ever-escalating performance, flexibility, and economy requirements, the networking industry has opted to build products around network processors. These new chips range from task-specific processors, such as classification and encryption engines, to more general-purpose packet or communications processors. Programmable yet application-specific, their designs are tailored to efficiently implement communications applications such as routing, protocol analysis, voice and data convergence, firewalls, VPNs, and QoS.<br /></p><p><br />Network processor design is an emerging field with issues and opportunities both numerous and formidable. To help meet this challenge, the editors of this volume created the first Workshop on Network Processors, a forum for scientists and engineers from academia and industry to discuss their latest research in the architecture, design, programming, and use of these devices. In addition to including the results of the Workshop in this volume, the editors also present specially commissioned material from practicing designers, who discuss their companies' latest network processors. <i>Network Processor Design: Issues and Practices</i> is an essential reference on network processors for graduate students, researchers, and practicing designers.<br /><br />* Includes contributions from major academic and industrial research labs including Aachen University of Technology; Cisco Systems; Infineon Technologies; Intel Corp.; North Carolina State University; Swiss Federal Institute of Technology; University of California, Berkeley; University of Dortmund; University of Washington; and Washington University.<br />* Examines the latest network processors from Agere Systems, Cisco, IBM, Intel, Motorola, Sierra Inc., and TranSwitch.</p>
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