Network processor design : issues and practices / by Patrick Crowley, Mark A. Franklin, Haldun Hadimioglu & Peter Z. Onufryk

Index present

1: Network processors: themes and challenges
2: Design principles
3: Power considerations in network processor design
4: Worst case execution time estimation for hard work assisted multithreaded processors
5: Multiprocessor scheduling in processor based router platforms : issues and ideas
6: A massively multithreaded packet processor
7: Exploring trade off in performance and programmability of processing element topologies for network processors
8: Packet classification and termination in a protocol processor
9: NP- Click: a programming model for the intel IXP1200
10: NEPAL: A framework for efficiently structuring applications for network processor
11: Efficient and faithful performance modeling for network processor based system design
12: High speed legitimacy based DDoS packet filtering with network processor: a case study and implementation on the intel IXP1200
13: Directions in packet classification for network processors
14: Implementing high performance, high value traffic management using Agere network processor solution
15: AMCC nPcore NISC artitecture
16: IDT Network search engine with QDR LA-1 interface
17: Adaptable bandwidth allocation for QoS support in network processor
18: Implementing voice over AAL2 on anetwork processor
19: Implementing QoS mechanisms on the motorola C- port C-5e network processor
20: A C- based programming language for multiprocessor network SoC architectures

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Annotation <p><br />As the demand for digital communication networks has increased, so have the challenges in network component design. To meet ever-escalating performance, flexibility, and economy requirements, the networking industry has opted to build products around network processors. These new chips range from task-specific processors, such as classification and encryption engines, to more general-purpose packet or communications processors. Programmable yet application-specific, their designs are tailored to efficiently implement communications applications such as routing, protocol analysis, voice and data convergence, firewalls, VPNs, and QoS.<br /></p><p><br />Network processor design is an emerging field with issues and opportunities both numerous and formidable. To help meet this challenge, the editors of this volume created the first Workshop on Network Processors, a forum for scientists and engineers from academia and industry to discuss their latest research in the architecture, design, programming, and use of these devices. In addition to including the results of the Workshop in this volume, the editors also present specially commissioned material from practicing designers, who discuss their companies' latest network processors. <i>Network Processor Design: Issues and Practices</i> is an essential reference on network processors for graduate students, researchers, and practicing designers.<br /><br />* Includes contributions from major academic and industrial research labs including Aachen University of Technology; Cisco Systems; Infineon Technologies; Intel Corp.; North Carolina State University; Swiss Federal Institute of Technology; University of California, Berkeley; University of Dortmund; University of Washington; and Washington University.<br />* Examines the latest network processors from Agere Systems, Cisco, IBM, Intel, Motorola, Sierra Inc., and TranSwitch.</p>

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