TY  - BOOK
AU  - Stallings,William
TI  - Computer organization and architecture: designing for performance 
SN  - 9788131732458 (pbk)
U1  - 004.22 
PY  - 2012///c
CY  - New Delhi
PB  - Pearson Eduction Private Limited
KW  - Computer organization
N1  - Index included; Chapter 0: Reader's Guide---------------------------
Chapter 1: Introduction---------------------------- 
Chapter 2: Computer Evolution and Performance--------------------------- 
Chapter 3: A Top-Level View of Computer Function and Interconnection-----------------------------
Chapter 4 Cache Memory-----------------------------
Chapter 6: External Memory--------------------------- 
Chapter 7 Input/Output------------------------------
Chapter 8 Operating System Support--------------------------
Chapter 9: Computer Arithmetic----------------------------- 
Chapter 10: Instruction Sets: Characteristics and Functions-------------------------- 
Chapter 11: Instruction Sets: Addressing Modes and Formats------------------------------ 
Chapter 12: Processor Structure and Function----------------------------
Chapter 13: Reduced Instruction Set Computers (RISCs)--------------------------- 
Chapter 14 Instruction-Level Parallelism and Superscalar Processors-------------------------------- 
Chapter 15: Control Unit Operation----------------------------- Chapter 16 Microprogrammed Control--------------------------- Chapter 17 Parallel Processing------------------------------- 
Chapter 18 Multicore Computers--------------------------------- APPENDIX A Projects for Teaching Computer Organization and Architecture------------------------------ 
Appendix B Assembly Language, Assemblers, and Compilers------------------------------ 
Chapter 19 Number Systems-------------------------- 
Chapter 20: Digital Logic-------------------------
Chapter 21: The IA-64 Architecture---------------------------
Appendix C: Hash Tables----------------------------
Appendix D: Victim Cache Strategies--------------------------
Appendix E: Interleaved Memory--------------------------
Appendix F: International Reference Alphabet----------------------------
Appendix G: Virtual Memory Page Replacement Algorithms---------------------
Appendix H: Recursive Procedures------------------------------
Appendix I: Additional Instruction Pipeline Topics-----------------------
Appendix j: Linear Tape Open Technology-----------------------------
Appendix K: DDR SDRAM---------------------------
N2  - For undergraduates and professionals in computer science, computer engineering, and electrical engineering courses. Learn the fundamentals of processor and computer design from the newest edition of this award winning text. Four-time winner of the best Computer Science and Engineering textbook of the year award from the Textbook and Academic Authors Association, Computer Organization and Architecture: Designing for
ER  -