| 000 | 02540nam a22002417a 4500 | ||
|---|---|---|---|
| 003 | OSt | ||
| 005 | 20131225150431.0 | ||
| 008 | 130330t20122000ii.ill.g |||| 001 0 eng d | ||
| 020 | _a9780070702103 (pbk) | ||
| 020 | _a0070702101 (pbk) | ||
| 040 | _cNCL | ||
| 082 |
_a005.35 _bHWA-A 2012 3492 |
||
| 100 | 1 |
_aHwang, Kai _9863 |
|
| 245 | 1 |
_aAdvanced computer architecture : _bparallelism, scalability, programmability / _cby Kai Hwang and Naresh Jotwani |
|
| 250 | _a2nd ed. | ||
| 260 |
_aNew Delhi ; _bMcGraw Hill Private Limited, _c2012, 2000c |
||
| 300 |
_aviii, 723 p. : _bill. ; _c24 cm. |
||
| 500 | _aIndex included | ||
| 505 | _a5.4. Sequential and Weak Consistency Models. Ch. 6. Pipelining and Superscalar Techniques. 6.1. Linear Pipeline Processors. 6.2. Nonlinear Pipeline Processors. 6.3. Instruction Pipeline Design. 6.4. Arithmetic Pipeline Design. 6.5. Superscalar and Superpipeline Design -- pt. III. Parallel and Scalable Architectures. Ch. 7. Multiprocessors and Multicomputers. 7.1. Multiprocessor System Interconnects. 7.2. Cache Coherence and Synchronization Mechanisms. 7.3. Three Generations of Multicomputers. 7.4. Message-Passing Mechanisms. Ch. 8. Multivector and SIMD Computers. 8.1. Vector Processing Principles. 8.2. Multivector Multiprocessors. 8.3. Compound Vector Processing. 8.4. SIMD Computer Organizations. 8.5. The Connection Machine CM-5. Ch. 9. Scalable, Multithreaded, and Dataflow Architectures. 9.1. Latency-Hiding Techniques. 9.2. Principles of Multithreading. 9.3. Fine-Grain Multicomputers. 9.4. Scalable and Multithreaded Architectures. 9.5. Dataflow and Hybrid Architectures. pt. IV. Software for Parallel Programming. Ch. 10. Parallel Models, Languages, and Compilers. 10.1. Parallel Programming Models. 10.2. Parallel Languages and Compilers. 10.3. Dependence Analysis of Data Arrays. 10.4. Code Optimization and Scheduling. 10.5. Loop Parallelization and Pipelining. Ch. 11. Parallel Program Development and Environments. 11.1. Parallel Programming Environments. 11.2. Synchronization and Multiprocessing Modes. 11.3. Shared-Variable Program Structures. 11.4. Message-Passing Program Development. 11.5. Mapping Programs onto Multicomputers. Ch. 12. UNIX, Mach, and OSF/1 for Parallel Computers. 12.1. Multiprocessor UNIX Design Goals. 12.2. Master-Slave and Multithreaded UNIX. 12.3. Multicomputer UNIX Extensions. 12.4. Mach/OS Kernel Architecture. 12.5. OSF/1 Architecture and Applications. | ||
| 650 |
_aComputer Architecture _9163 |
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| 700 | 1 |
_aJotwani, Naresh _9864 |
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| 942 |
_2ddc _cBK |
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| 999 |
_c2395 _d2395 |
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